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專利授權區
專利名稱(英)	DECODER FOR DECODING DATA IN A PAM-(2M＋1-1) FORMAT BECAUSE OF 1＋D PULSE SHAPING, DECODER DEVICE USING THE DECODER, AND RECEIVER USING THE DECODER DEVICE
專利家族	中華民國：I882830 美國：12,494,954
專利權人	國立清華大學 100.00%
發明人	彭朋瑞,林彥博
技術領域	通信傳輸,電子電機

專利摘要(英)
A decoder includes a signal amplifier, a demultiplexer and multiple ADCs. The signal amplifier receives a to-be-amplified data signal that originated from an input data signal in a PAM-2M format and that is in a PAM-(2M＋1-1) format because of 1＋D pulse shaping, and performs amplification and level shifting on the to-be-amplified data signal to generate a to-be-decoded data signal, where M2. The demultiplexer receives the to-be-decoded data signal, and demultiplexes the to-be-decoded data signal into multiple demultiplexed data signals to be respectively received by the ADCs. One of the ADCs is an (M＋2)-bit ADC, and converts the corresponding demultiplexed data signal into a first decoded signal containing an (M＋1)-bits wide data portion and a one-bit wide error portion. Each of the other one(s) of the ADCs is an (M＋1)-bit ADC, and converts the corresponding demultiplexed data signal into a second decoded signal containing an (M＋1)-bits wide data portion.

專利摘要(英)

A decoder includes a signal amplifier, a demultiplexer and multiple ADCs. The signal amplifier receives a to-be-amplified data signal that originated from an input data signal in a PAM-2M format and that is in a PAM-(2M＋1-1) format because of 1＋D pulse shaping, and performs amplification and level shifting on the to-be-amplified data signal to generate a to-be-decoded data signal, where M2. The demultiplexer receives the to-be-decoded data signal, and demultiplexes the to-be-decoded data signal into multiple demultiplexed data signals to be respectively received by the ADCs. One of the ADCs is an (M＋2)-bit ADC, and converts the corresponding demultiplexed data signal into a first decoded signal containing an (M＋1)-bits wide data portion and a one-bit wide error portion. Each of the other one(s) of the ADCs is an (M＋1)-bit ADC, and converts the corresponding demultiplexed data signal into a second decoded signal containing an (M＋1)-bits wide data portion.

聯絡資訊
承辦人姓名	李曉琪
承辦人電話	03-5715131 #31061
承辦人Email	hsiaochi@mx.nthu.edu.tw