A high density embedded-artificial synaptic element includes a semiconductor substrate, a select transistor, a metal layer and a memory transistor. The select transistor is disposed on the semiconductor substrate and includes a first gate structure, a drain region and a source region. The drain region and the source region are located on the opposite sides of the first gate structure. The metal layer is connected to the drain region. The memory transistor is disposed on the semiconductor substrate and includes a second gate structure, a first electrode region, a second electrode region, a first memristor and a second memristor. The second gate structure is connected to the metal layer. The first memristor is formed between the second gate structure and the first electrode region. The second memristor is formed between the second gate structure and the second electrode region. |