A transpose accessing memory device is provided, the global word-lines configured to be selected as horizontal word-lines in a row access mode in that at least one row of the memory array is selected to be access, and the corresponding local I/O circuit is configured to guide signals of the local bit-lines coupled to the selected SRAM memory cells to the corresponding horizontal global bit-lines in response to select signals from the global word-lines, and the global word-lines configured to be selected as vertical word-lines in a column access mode in that at least one column of the memory array is selected to be access, and the corresponding local I/O circuit is configured to guide signals of the local bit-lines coupled to the selected SRAM memory cells to the corresponding vertical global bit-lines in response to select signals from the global word-lines. |