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專利授權區
專利名稱(中)	單石積體化氮化鎵疊接電晶體
專利名稱(英)	A Monolithically Integrated GaN Cascode
專利家族	中華民國：I923248
專利權人	國立清華大學 100.00%
發明人	吳孟奇
技術領域	能源科技,電子電機

專利摘要(中)
一種單石積體化氮化鎵疊接電晶體，包含一基板、一緩衝層、一氮化鎵通道層、一氮化鋁鎵層、一源極、一汲極、一E型閘極、一D型閘極，及一節點電極。該E型閘極設置在該氮化鋁鎵層，並包括一P型摻雜氮化鎵層，和一設置在該P型摻雜氮化鎵層的E型閘極導電層。該D型閘極電連接該源極，並包括一介電層和一D型閘極導電層。該節點電極電連接該D型閘極。該P型摻雜氮化鎵層的設置間接改變了該氮化鋁鎵層與該氮化鎵通道層之接面能帶特性，讓該電晶體具有常關型的特性。由於該電晶體並未設置氟離子佈植區，相較於習知技術具備較佳的電學特性。

專利摘要(中)

一種單石積體化氮化鎵疊接電晶體，包含一基板、一緩衝層、一氮化鎵通道層、一氮化鋁鎵層、一源極、一汲極、一E型閘極、一D型閘極，及一節點電極。該E型閘極設置在該氮化鋁鎵層，並包括一P型摻雜氮化鎵層，和一設置在該P型摻雜氮化鎵層的E型閘極導電層。該D型閘極電連接該源極，並包括一介電層和一D型閘極導電層。該節點電極電連接該D型閘極。該P型摻雜氮化鎵層的設置間接改變了該氮化鋁鎵層與該氮化鎵通道層之接面能帶特性，讓該電晶體具有常關型的特性。由於該電晶體並未設置氟離子佈植區，相較於習知技術具備較佳的電學特性。

專利摘要(英)
A monolithically integrated GaN cascode includes a substrate, a buffer layer, a GaN channel layer, an AlGaN layer, a source, a drain, an E-gate, a D-gate, and a node electrode. The E-gate disposed on the aluminum gallium nitride layer and includes a P-type doped gallium nitride layer, and an E-gate conductive layer disposed on the P-type doped gallium nitride layer. The D-type gate electrically connects to the source and includes a dielectric layer and a D-type gate conductive layer. The node electrode is electrically connected to the D-type gate. A junction band characteristic of the aluminum gallium nitride layer and the gallium nitride channel layer is indirectly changed by disposing the P-type doped gallium nitride layer, so that the transistor has a normally off property. Since the transistor does not have a fluoride ion implantation region, the transistor has better electrical properties in comparison with the prior art.

專利摘要(英)

A monolithically integrated GaN cascode includes a substrate, a buffer layer, a GaN channel layer, an AlGaN layer, a source, a drain, an E-gate, a D-gate, and a node electrode. The E-gate disposed on the aluminum gallium nitride layer and includes a P-type doped gallium nitride layer, and an E-gate conductive layer disposed on the P-type doped gallium nitride layer. The D-type gate electrically connects to the source and includes a dielectric layer and a D-type gate conductive layer. The node electrode is electrically connected to the D-type gate. A junction band characteristic of the aluminum gallium nitride layer and the gallium nitride channel layer is indirectly changed by disposing the P-type doped gallium nitride layer, so that the transistor has a normally off property. Since the transistor does not have a fluoride ion implantation region, the transistor has better electrical properties in comparison with the prior art.

聯絡資訊
承辦人姓名	李曉琪
承辦人電話	03-5715131 #31061
承辦人Email	hsiaochi@mx.nthu.edu.tw