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專利授權區
專利名稱(中) 半導體之貫孔內連接線的製造方法
專利名稱(英) METHOD FOR FABRICATING INTERCONNECTING LINES INSIDE VIA HOLES OF SEMICONDUCTOR DEVICE
專利家族 中華民國:I482240
美國:8,679,974
專利權人 國立清華大學 100%
發明人 林佳漢,李豐宇,方維倫
技術領域 機械結構,電子電機
專利摘要(中)
A method for fabricating interconnecting lines inside via holes of a semiconductor device comprises steps of providing a template having a receiving trench and a connection surface both on the same side of the template; filling an electric-conduction material into the receiving trench; connecting a substrate having at least one via hole with the connection surface to interconnect the via hole with the receiving trench; heating the electric-conduction material to a working temperature to liquefy a portion of the electric-conduction material and make it flows from the receiving trench into the via hole; and cooling the electric-conduction material to form an interconnecting line inside the via hole. The present invention fabricates interconnecting lines by a heat-forming method, which features simple steps and has advantages of shorter fabrication time, lower fabrication complexity, higher fabrication efficiency, higher yield and lower fabrication cost.
聯絡資訊
承辦人姓名 劉千綺
承辦人電話 03-571-5131 #31181
承辦人Email chienchi@mx.nthu.edu.tw
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