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專利授權區
專利名稱(中)	三維電阻式記憶體結構
專利名稱(英)	THREE-DIMENSIONAL RESISTIVE RANDOM ACCESS MEMORY STRUCTURE
專利家族	中華民國：I806812
專利權人	國立清華大學 100.00%
發明人	金雅琴,林崇榮,黃耀弘
技術領域	材料化工,工業工程,電子電機

專利摘要(中)
本發明提供一種三維電阻式記憶體結構包含基底層、第一層、第二層及第三層。第一層包含三第一導電層及二第一通孔。第一導電層之其中二者分別電性連接二第一通孔。第二層包含四第二導電層及四第二通孔。第二通孔之其中二者及第二導電層之其中二者之間形成四電阻性元件。第二導電層之另二者電性連接二第一通孔，且分別電性連接第二通孔之另二者。第二導電層之其中二者沿一第一方向延伸。第三層包含二第三導電層。第三導電層電性連接第二通孔且沿一第二方向延伸。第一方向垂直第二方向。藉此，提升記憶體的設置密度。

專利摘要(中)

本發明提供一種三維電阻式記憶體結構包含基底層、第一層、第二層及第三層。第一層包含三第一導電層及二第一通孔。第一導電層之其中二者分別電性連接二第一通孔。第二層包含四第二導電層及四第二通孔。第二通孔之其中二者及第二導電層之其中二者之間形成四電阻性元件。第二導電層之另二者電性連接二第一通孔，且分別電性連接第二通孔之另二者。第二導電層之其中二者沿一第一方向延伸。第三層包含二第三導電層。第三導電層電性連接第二通孔且沿一第二方向延伸。第一方向垂直第二方向。藉此，提升記憶體的設置密度。

專利摘要(英)
A three-dimensional resistive random access memory structure is proposed. The three-dimensional resistive random access memory structure includes a base layer, a first layer, a second layer and a third layer. The first layer includes three first conductive layers and two first vias. Two of the three first conductive layers are electrically connected to the two first vias. The second layer includes four second conductive layers and four second vias. Four resistive elements are formed between two of the four second vias and two of the four second conductive layers. Another two of the four second conductive layers are electrically connected between the two first vias and another two of the four second vias. Two of the second conductive layers are extended along a first direction. The third layer includes two third conductive layers. The two third conductive layers are extended along a second direction. The first direction is vertical to the second direction. Thus, the disposed density of the three-dimensional resistive random access memory structure of the present disclosure can be increased.

專利摘要(英)

A three-dimensional resistive random access memory structure is proposed. The three-dimensional resistive random access memory structure includes a base layer, a first layer, a second layer and a third layer. The first layer includes three first conductive layers and two first vias. Two of the three first conductive layers are electrically connected to the two first vias. The second layer includes four second conductive layers and four second vias. Four resistive elements are formed between two of the four second vias and two of the four second conductive layers. Another two of the four second conductive layers are electrically connected between the two first vias and another two of the four second vias. Two of the second conductive layers are extended along a first direction. The third layer includes two third conductive layers. The two third conductive layers are extended along a second direction. The first direction is vertical to the second direction. Thus, the disposed density of the three-dimensional resistive random access memory structure of the present disclosure can be increased.

聯絡資訊
承辦人姓名	李曉琪
承辦人電話	03-5715131 #31061
承辦人Email	hsiaochi@mx.nthu.edu.tw