This invention provides a ferroelectric field effect transistor device which comprises a semiconductor base having a setting plane, and a three-dimensional transistor including a physical channel, a drain, a source, and a gate. Said physical channel has a channel body that is protruding from said setting plane or disposing above the setting plane and is arranged with disposed opposite of a first end and a second end, and a gate dielectric layer that is covering said channel body and made of crystallinity HfZrO with a thickness ranging from 2 nm to 5 nm. Said drain protrudes from said setting plane so as to connect said first end of said channel body. Said source protrudes from said setting plane so as to connect said second end of said channel body. Said gate covers said physical channel and isolates electrically from said drain and said source. |