專利授權區 | |
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專利名稱(中) | 位元串列運算裝置與測試方法 |
專利名稱(英) | BIT-SERIAL COMPUTING DEVICE AND TEST METHOD FOR EVALUATING THE SAME |
專利家族 |
PCT:WO2023138656A1(公開號) 中華民國:I839079 大陸:CN118556224A(公開號) 美國:2023-0236797(公開號) |
專利權人 | 國立清華大學 100% ,國立清華大學 100% |
發明人 | 蔡喻至,丁文謙,呂仁碩 |
技術領域 | 資訊工程,電子電機 |
專利摘要(英) |
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A bit-serial computing device includes a computing circuit and a scaler. The computing circuit includes multiple MAC slices, and receives a multiplier vector and a multiplicand vector that contains multiple multiplicand inputs. Each multiplicand input contains multiple multiplicand segments that have different significances. The significances respectively correspond to the MAC slices. Correspondence between the significances and the MAC slices is variable. Each MAC slice calculates an inner product of the multiplier vector and a vector that is constituted by the multiplicand segments of the multiplicand inputs having the significance corresponding to the MAC slice. With respect to each MAC slice, the scaler multiplies the inner product that is calculated by the MAC slice by a weighting ratio that represents the significance corresponding to the MAC slice, so as to obtain a scaled inner product that corresponds to the MAC slice. |
聯絡資訊 | |
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承辦人姓名 | 李曉琪 |
承辦人電話 | 03-5715131 #31061 |
承辦人Email | hsiaochi@mx.nthu.edu.tw |